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Posting history for user ANT::BLYDA

53 notes across 1 conferences

Summary of Posts

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Posts		Conference Title
milkwy::23class_semiconductor5323class Semiconductors

Conference milkwy::23class_semiconductor (23class Semiconductors)

53 posts
TOPIC1.0Wed Mar 15 1989 16:03 Introduction and Guidelines 31 lines
TOPIC2.0Wed Mar 15 1989 16:03 DEC Standard 184 25 lines
2.1Wed Mar 15 1989 16:05 DEC Standard 184 Text 433 lines
TOPIC3.0Wed Mar 15 1989 16:04 User Configurable Logic Ref. List 11 lines
TOPIC4.0Wed Mar 15 1989 16:06 Quick Reference Guides 26 lines
4.1Wed Mar 15 1989 16:06 Good Practice Techniques 93 lines
TOPIC5.0Wed Mar 15 1989 16:07 HOTLINE Information 20 lines
TOPIC6.0Wed Mar 15 1989 16:07 Who's Who in ESTG 26 lines
TOPIC7.0Wed Mar 15 1989 16:08 Most Frequently Asked Questions 19 lines
7.1Wed Mar 15 1989 16:13 How Do I Get Documentation ? 29 lines
7.3Fri May 05 1989 16:46 How do I run PTOC? 31 lines
7.4Tue May 23 1989 12:30 Why won't CUPL execute ? 48 lines
TOPIC8.0Wed Mar 15 1989 16:08 23CLASS Bulletin Board 23 lines
8.1Wed Mar 15 1989 16:35 CUPL 2.5 Release Notes 69 lines
8.2Wed Mar 15 1989 16:35 ALDG 2.0 Release Notes 57 lines
TOPIC9.0Wed Mar 15 1989 16:08 Supported Tools 29 lines
TOPIC10.0Wed Mar 15 1989 16:08 Unsupported Tools 25 lines
10.1Wed Mar 15 1989 16:09 PALASM 20 lines
10.2Wed Mar 15 1989 16:09 PALSIM 14 lines
10.3Wed Mar 15 1989 16:10 PTOC 16 lines
10.4Wed Mar 15 1989 16:10 AMAZE 20 lines
10.5Wed Mar 15 1989 16:10 SOCRATES 20 lines
TOPIC11.0Wed Mar 15 1989 16:18 PLCAD Environment Installation Kit 30 lines
TOPIC12.0Fri Mar 17 1989 12:13 Non-Volatile Memory Reference Lists 18 lines
TOPIC13.0Fri Mar 17 1989 12:17 XILINX TRAINING COURSES 7 lines
TOPIC14.0Fri Mar 17 1989 12:17 Xilinx Tools - DECStation 7 lines
TOPIC15.0Fri Mar 17 1989 12:17 Xilinx Tools - PC 7 lines
TOPIC16.0Fri Mar 17 1989 12:18 Reserved for future use 7 lines
TOPIC17.0Fri Mar 17 1989 12:18 ESTD Software Applications 7 lines
TOPIC18.0Fri Mar 17 1989 12:18 SHOW23 Program 7 lines
TOPIC19.0Fri Mar 17 1989 12:19 23CLASS Release Coordinator 7 lines
TOPIC20.0Fri Mar 17 1989 12:19 SBO Test Engineers 7 lines
TOPIC21.0Fri Mar 17 1989 12:19 POET Process 7 lines
TOPIC22.0Fri Mar 17 1989 12:20 Reserved for Future Use 7 lines
TOPIC23.0Fri Mar 17 1989 12:20 Reserved for Future Use 7 lines
TOPIC24.0Fri Mar 17 1989 12:20 Reserved for Future Use 7 lines
TOPIC25.0Fri Mar 17 1989 12:20 Reserved for Future Use 7 lines
TOPIC27.0Fri Mar 17 1989 13:32 CUPL 2.50a Bugs 9 lines
27.1Fri Mar 17 1989 13:37 FUNCTION keyword incorrectly processed 26 lines
27.5Mon Apr 10 1989 16:00 22V10 polarity bug 43 lines
27.6Fri May 19 1989 13:03 FIELD name case-sensitivity 41 lines
27.7Tue Aug 15 1989 15:20 22V10 polarity bug fixed 43 lines
TOPIC 32.0 CUPL problem - Won't invert feedback
32.1Tue Apr 11 1989 11:00 I hear you and am working on it! 23 lines
32.2Tue Apr 11 1989 11:00 Dont use that jedec file 12 lines
TOPIC35.0Thu May 11 1989 16:35 CUPL 2.5 22v10 update info 47 lines
TOPIC 39.0 JEDEC file conversion from 105 to 405
39.1Mon Jun 05 1989 16:50 PLUS 405 Fuse Map 77 lines
39.4Mon Jun 12 1989 13:09 FPLS... but no 405. 34 lines
TOPIC 40.0 PLUS405 PRESET/RESET or OE
40.1Tue Jun 13 1989 14:13 More to the Problem than Meets the OE 80 lines
40.3Wed Jun 14 1989 13:26 PRESET/RESET constraints 34 lines
TOPIC 43.0 Warning about use of 22V10PLCC and CUPL!
43.1Fri Jul 07 1989 11:44 Using the wrong mnemonic ??? 46 lines
TOPIC 47.0 Conditional State Machine Output Syntax
47.1Fri Aug 11 1989 17:45 Try these CUPL techniques. 54 lines
TOPIC 50.0 Address range specification problem in CUPL
50.2Wed Aug 30 1989 15:02 Unintentional variable indexing happening 15 lines
TOPIC 51.0 What are CUPL v3.0 plans?
51.1Thu Sep 07 1989 16:05 A couple of CUPLs can be confusing 44 lines

Additional information

First Post:Wed Mar 15 1989
Last Post:Thu Sep 07 1989
# Topics:27
# Replies:26
# We have note bodies for:0
Total memory used by this script: 553,456 (2,097,152)