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Conference netcad::hub_mgnt

Title:	DEChub/HUBwatch/PROBEwatch CONFERENCE
Notice:	Firmware -2, Doc -3, Power -4, HW kits -5, firm load -6&7
Moderator:	NETCAD::COLELLADT

Created:	Wed Nov 13 1991
Last Modified:	Fri Jun 06 1997
Last Successful Update:	Fri Jun 06 1997
Number of topics:	4455
Total number of notes:	16761

2037.0. "DECswitch 900 EF architecture?" by GOYA::JOSEF (Jose Fernandez. ACT Spain) Wed Feb 22 1995 06:43

Hi,

Does anyone know what's the DECswitch 900 EF internal arquitecture in terms 
of processor type (RISC, CISC,...), switching chip type, etc.?

Thanks in advance,
Josee

T.R	Title	User	Personal Name	Date	Lines
2037.1	RE: Processor architecture of 900EF...	NETCAD::BATTERSBY		`Thu Feb 23 1995 10:48`	6
	The DECswitch 900EF uses a Motorola 68EC040 32 bit processor with a 4 KB each of on-chip instruction, and data cache, running at 25mhz. The FDDI subsystem within uses a 68000 cpu running at 12.5mhz. Bob
2037.2	Thanks	GOYA::JOSEF	Jose Fernandez. ACT Spain	`Thu Feb 23 1995 12:09`	2
	Thanks Bob. Jose