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Conference 49.910::kav30

Title:VAX on VMEbus: KAV30
Notice:Could have been as fast as 68K but its a VAX!
Moderator:CSSVMS::KAV30_SUPP
Created:Thu Apr 18 1991
Last Modified:Fri Aug 02 1996
Last Successful Update:Fri Jun 06 1997
Number of topics:159
Total number of notes:645

103.0. "read-modify-write cycle support" by SOLVIT::EGHLIMA () Tue Sep 14 1993 22:01

 Hi,
    
    I am writing a device driver for the KAV30 to support the Radstone
    SIO-4 serial line card. I need to perform a read-modify-write cycle
    operation. 
    
    Does KAV30 support read-modify-write cycle, and if it does how can I
    use it?
    
    Thanks for any info...
    
    Ali,
T.RTitleUserPersonal
Name		DateLines
103.1HERR::crosbieGraham Crosbie @PCS DTN 873-4193Wed Sep 15 1993 10:079
    Hi Ali,   

    >Does KAV30 support read-modify-write cycle, and if it does how can I
    >use it?
    
    The KAV30 supports RMW cycles on the VMEbus, the KAV$BUS_BITSET and
    KAV$BUS_BITCLR routines cause a RMW cycle to issued.

    Graham
103.2using KAV$BUS_BITSET as a Test and SetSOLVIT::EGHLIMAWed Sep 15 1993 20:2511
    Hi Graham,
    
    The KAV$BUS_BITSET set the specified bit without cheching the bit
    staste (set or clear). Is there anyway to use the KAV$BUS_BITSET
    or any other KAV30 command as a Test And Set instruction, I mean it
    ONLY set the bit if it is clear , otherwise return a status which
    indicates the the specified bit already set.
    
    Thanks
    
    Ali,
103.3HERR::crosbieGraham Crosbie @PCS DTN 873-4193Thu Sep 16 1993 09:3915
    Hi Ali,
    
    >The KAV$BUS_BITSET set the specified bit without cheching the bit
    >staste (set or clear). Is there anyway to use the KAV$BUS_BITSET
    >or any other KAV30 command as a Test And Set instruction, I mean it
    >ONLY set the bit if it is clear , otherwise return a status which
    >indicates the the specified bit already set.
    
    The only way to do this would be to issue two cycles on the VMEbus, a read
    cycle, check if the bit is clear, and then if neccessary a write cycle to
    set the bit.  The KAV30 does not support test and set (TAS) cycles on the
    VMEbus (This is a VAX architecture restriction).  Why do you want to
    do this in a single VMEbus cycle?  Is this a multi-procesor environment?

    Graham