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Conference vaxaxp::alphanotes

Title:Alpha Support Conference
Notice:This is a new Alphanotes, please read note 2.2
Moderator:VAXAXP::BERNARDO
Created:Thu Jan 02 1997
Last Modified:Fri Jun 06 1997
Last Successful Update:Fri Jun 06 1997
Number of topics:128
Total number of notes:617

59.0. "PR$_SID,VA$V_VPN,PHD$L_P0BR" by GALVIA::FOX_F () Tue Mar 11 1997 06:47

     I am getting the following warnings when linking an application which
    has been ported from VMS to Alpha.  I suspect the symbols do not port,
    is
    this correct and if so, any help as to what they are on Alpha ?
    
    %LINK-I-UDFSYM,         PR$_SID
    %LINK-I-UDFSYM,         VA$V_VPN
    %LINK-I-UDFSYM,         PHD$L_P0BR
    
    Thanks.
T.RTitleUserPersonal
Name
DateLines
59.1need more infoEVMS::KUEHNELAndy K�hnelTue Mar 11 1997 08:5710
    You are correct: these symbols "do not port".  Alpha has no architected
    System ID register, and even on VAX this was less well defined than
    many thought.  You'll need to look at the application and tell us what it
    wanted to do with this information.  Then we might be able to help you.
    
    Likewise, memory management on VAX and Alpha are very differently. 
    Without exact knowledge of what this application wanted to achieve
    using VA$V_VPN and PHD$L_P0BR we cannot provide an alternative.  Since
    memory management underwent an additional big change between V6.2 and
    V7.0, I hope you are trying to port to V7.x ...
59.2ALPHA_IMPLVER_AMASK_FEATURES.CXDELTA::HOFFMANSteve, OpenVMS EngineeringTue Mar 11 1997 10:0454
: Alpha has no architected System ID register...

   If one thinks only of the architected portion of the VAX SID -- the
   upper-most byte of the SID; used to indicate the VAX processor or
   VAX microprocessor "family" -- then Alpha has an equivilent: it's
   accessable via an instruction called IMPLVER.

   Here is some code:

/*
//  ALPHA_IMPLVER_AMASK_FEATURES.C
//  Retrieve the Alpha microprocessor family and features
//
//  Author: Steve Hoffman, Digital Equipment Corporation
//  [email protected], 16-Jan-1997.
//
//  DEC C V5 and later under OpenVMS. 
//  Also operates under DEC C on Digital UNIX V4.0 and later.
//
//  See the Alpha Architecture Reference Manual for the current
//  microprocessor family codes, as well as the instruction set
//  extension definition codes.
*/
#include <stdio.h>
#include <c_asm.h>
main()
    {
    int implver = asm("implver %r0;");
    int amask = asm("amask %a0,%r0;", -1 );
    int definedbits = 0;

    printf("Alpha Microprocessor Family:\n");
    /*
    //  The "microprocessor family" includes the named microprocessor,
    //  and various microprocessors (if any) derived from it.
    */
    printf("  DECchip 21%1.1d64 or variant\n", implver );
    printf("  (EV%1.1d microprocessor core)\n", implver + 4 );

    /*
    //  The bit is *clear* if the capability is *present*...
    */
    printf("Alpha extensions available:\n");
    if ( !~amask ) printf("  none.\n");
    definedbits |= 1L<<0;
    if ( ~amask & 1L<<0 ) printf("  byte-word, et al.\n");
    definedbits |= 1L<<1;
    if ( ~amask & 1L<<1 ) printf("  square root, et al.\n");
    definedbits |= 1L<<8;
    if ( ~amask & 1L<<8 ) printf("  Audio and video, et al.\n");
    if ( ~amask & ~definedbits ) printf("  Unknown capability bit present.");
    return 1;
    }

59.4More Info GALVIA::FOX_FTue Mar 11 1997 10:1196

Hi,

	I'm afraid I'm quite new at this (isn't that what they all say ?!).
I've attached an example function where VA$V_VPN/VA$S_VPN and PHD$L_P0BR are 
used.  The good news is that we dont need help with the PR$_SID ( found
other functions that are used instead by our application).....the bad news is 
we're V6.2.


Thanks again,

Sinead



; SRCADR(AP) -	Source System Space Address
; DSTADR(AP) -	Destination Process Address (must not be mapped to process pages)
; PAGCNT(AP) -	Page Count (Default=16 pages)
;
	.PSECT	INTACT$$$CODE,PAGE,NOWRT,EXE,PIC

.ENTRY	INTACT$$$MPSYSR,^M<R2,R3,R4,R5,R6,R7> ;MAP SYSTEM SPACE
	MOVL	@#CTL$GL_PHD,R2			;[168] get process head pages
	BBS	#PRV$V_CMKRNL,PHD$Q_PRIVMSK(R2),5$ ;[168] if bit set, ok
	MOVZWL	#SS$_NOPRIV,R0			;[168] no priv for operation
	RET					;[168] return to user with err
5$:
	MOVL	@PAGCNT(AP),R0		;R0 = Number of pages to map
	BNEQ	10$			;IF NEQ - PAGE COUNT SPECIFIED
;	ADDL2	#8,SP			;[V020-401] Pop storage
	MOVL	#16,R0			;DEFAULT IS SIXTEEN PAGES
10$:	MOVL	SRCADR(AP),R2		;R2 = System space VA
	LOCK	LOCKNAME=MMG;,-		;[V020-401] LOCK MMG DATABASE
;		LOCKIPL=#IPL$_SYNCH,-	;[V020-401] RAISE IPL
;		PRESERVE=YES		;[V020-625] PRESERVE R0 (page count)
	MOVL	G^CTL$GL_PHD,R5		;R5 -> PHD
	IFNOWRT	#4,(R2),103$		;IF NO WRITE ACCESS - ERROR
	IFNOWRT	#4,DSTADR(AP),103$	;IF NO WRITE ACCESS - ERROR
	ASHL	#-9,R2,R6		;R6 = VPN OF S0 ADDRESS SPECIFIED
	BGEQ	103$			;IF GEQ - ADDRESS NOT IN S0 SPACE
;	[V020A-705]	Start -  - VMS 6.0 Changes
	.If DF VMS_V5
	EXTZV	#VA$V_VPN,#VA$S_VPN,R2,R6 ;R6 = VIRTUAL PAGE NUMBER
	.endc;df VMS_V5
	.If DF VMS_V6
	EXTZV	#VA$V_SVPN,#VA$S_SVPN,R2,R6 ;R6 = VIRTUAL PAGE NUMBER
	.endc;df VMS_V6
;	[V020A-705]	End - VMS 6.0 Changes
	MOVL	G^MMG$GL_SPTBASE,R3	;R3 -> BASE OF SYSTEM PTE'S
	MOVAL	(R3)[R6],R3		;R3 -> FIRST PTE OF ALLOCATED BLOCK
	MOVL	DSTADR(AP),R2		;R2 -> PROCESS VA
	MOVL	PHD$L_P0BR(R5),R7	;R7 -> START OF PROCESS P0 PTE'S
;	[V020A-705]	Start - VMS 6.0 Changes
	.If DF VMS_V5
	EXTZV	#VA$V_VPN,#VA$S_VPN,R2,R6 ;R6 = VPN (OF PROCESS P0 PAGE)
	.endc;df VMS_V5
	.If DF VMS_V6
	EXTZV	#VA$V_SVPN,#VA$S_SVPN,R2,R6 ;R6 = VPN (OF PROCESS P0 PAGE)
	.endc;df VMS_V6
;	[V020A-705]	End - VMS 6.0 Changes
	MOVAL	(R7)[R6],R7		;R7 -> BASE OF PROCESS P0 PTE'S
100$:	BISL3	#<PTE$M_VALID!PTE$M_WINDOW>,(R3)+,(R7)+
	BRB 105$
103$:	BRW 200$
105$:					;MOVE SYSTEM PTE TO PROCESS PTE
					; SET VALID AND WINDOW BIT'S IN PTE
;	[V020A-705]	Start - Remove old V4/V5 dependencies
;	.IF DEFINED VMS_V4
;	INVALID	R2			;INVALIDATE TRANSLATE BUFFER
;	.ENDC;VMS_V4
;	.IF DEFINED VMS_V5
;	INVALIDATE_TB	R2,CHECKS=NO	

	TBI_ALL				;Alpha macro to invalidate TB

; [469] Invalidate transfer buffer
;	.ENDC;VMS_V5
;	[V020A-705]	End - Remove old V4/V5 dependencies
	ADDL2	#^X200,R2		;R2 -> NEXT PROCESS PAGE
	SOBGTR	R0,107$			; CONTINUE TILL ALL PTE'S DONE
	BRB 110$
107$:	BRW 100$	

110$:	MOVZWL	#SS$_NORMAL,R0		;SAY NORMAL
	BRB	210$

200$:	MOVL	#SS$_ACCVIO,R0		;SAY "ACCESS VIOLATION"
210$:	PUSHL	R0
	UNLOCK	LOCKNAME=MMG,-		;[V020-401] UNLOCK MMG DATABASE
		NEWIPL=#0,-		;[V020-401] DROP IPL
		PRESERVE=NO		;[V020-401] DON'T PRESERVE R0
	POPL	R0
	RET				;RETURN
    
59.5Some ideas for how to rewrite the codeEVMS::NOELTue Mar 11 1997 13:5741
There are several problems with this routine even on VAX:

o It doesn't take into account that the process page table might
  be invalid. The page table is accessed at IPL 8. This could crash 
  the system.

o It doesn't do proper VMS accounting for the page table page with
  repect to window pages. There are counters that are incremented
  and decremented that keep track of window pages. The system
  can crash if this process is ever swapped or if the process is
  run down before these PTEs are cleaned up in the opposite way they
  were created.

o Probably others...


What this routine is really doing is trying to PFN-map in an efficient way.
I would suggest the following rewrite (in C or macro) for Alpha and VAX:

o Enter kernel mode, IPL 0
o Inputs are process VA, system VA and number of pagelets
o Convert pagelets to pages
o Convert system VA to system PTE 
o Loop for number of pages:
o  Read PFN from system PTE (probably don't need MMG lock if you know this
   system buffer is not going away)
o  Call sys$crmpsc setting SEC$M_PFNMAP to do PFN-mapping
o  Increment process VA and system PTE
o  Goto loop

Of course, this would only literally and more correctly port the code. It
would not be fast. This would work for all Alpha versions, even V7.0 and
V7.1.

And... I wonder why the application even wants to perform this function?
If you can avoid this type of privileged code, that would be even better.
Actually, if you want something double-mapped in system space and
process space, try buffer objects. Look at sys$create_bufobj_64 in the V7.x 
documentation.

- Karen