| This is expected behavior.
There are four types of reset, over and above power on reset:
1. Front-panel reset
2. SRM console init command (system software reset)
3. RCM (remote console monitor) reset
4. Software PCI reset - does not reset entire system, but rather,
only the PCI buses.
The first three all produce the same behavior. The entire system is
reset. The last does not reset the system bus (CPUs, memory, MCBus,
etc.)
The SRM console resets the PCIs any time the console must transition
from a running operating system back to console in interrupt mode. When
UNIX/VMS return to console via halt, shutdown, reboot, crash dump, the
console runs polled (IPL 31) until a request is made that requires the
console to switch back to interrupt mode (examples: SHOW DEVICE, BOOT
or reboot, TEST command, etc.) The console resets all PCI buses before
turning on interrupts in this case.
Thus, if the system in question had been shutdown and then been booted,
or rebooted or crashed, one would expect to see that the last reset was
a software PCI reset.
Note that UNIX and VMS never reset the PCI buses. Only console ever
does so. This means the last reset you saw was from console switching
to interrupt mode. Are you sure you saw the entire system reset versus
just say the VGA being re-initialized and all I/O devices being reset?
I've provided a code snippet for SHOW POWER's last reset status. It's
likely more details than you care to know, but I figured I'd include it
for completeness.
/*
* Two versions of the Saddle's last reset register exist. Each has bugs in it,
* at least in terms of agreement with the System Programmer's Manual (SPM).
* Initial designs return the following values:
*
* 4 3 2 1 0
* +-----+-----+-----+-----+-----+
* | RCM | OCP | CAP | SFT | XXX |
* +-----+-----+-----+-----+-----+
* 0 0 0 1 X Software reset (write to bit 0 above)
* 0 0 1 0 X Power-on or PCI reset
* 0 1 0 0 X OCP (front-panel) reset
* 1 0 0 0 X RCM reset
*
* Newer designs (H03 Saddles and beyond) return the following values:
*
* 0 0 0 1 X Software reset (write to bit 0 above)
* 0 0 0 0 X Power-on
* 0 1 0 X X OCP (front-panel) reset
* 1 0 0 X X RCM reset
*
* On H03 Saddles, once the software reset bit has been set, it remains set.
* One therefore can read both software reset and OCP reset set if an OCP
* reset. Same idea for RCM reset (software reset can be set). A power-on
* clears all state, so the software reset bit is cleared (if previously set).
*
* PCI reset has been lost in the H03 (and beyond) Saddle's last reset status.
* On top of this, PCI resets clear last reset status of certain other bits -
* with the exception that once software reset is set, it remains set.
*
* Console accounts for both implementations by doing the following:
*
* Following a PCI reset, set PCI_RESETTED flag. Clear flag during power-up.
* If (PCI_RESETTED=1, assume a PCI reset as the last reset)
* ELSE (read last reset register contents and decode as described below).
*
* If 0000X, then new Saddle --> power-on reset.
* If 0010X, then old Saddle --> power-on reset.
* If 0001X, then either new or old Saddle --> software reset.
* If 010XX, then either new or old Saddle --> OCP reset.
* If 100XX, then either new or old Saddle --> RCM reset.
*
*/
sprintf(reset_string, "n unknown");
reset_reason = inportb(0, RESET_CONTROL) & RESET_REASON_MASK;
if ( pci_resetted == 1 ) { /* Assume console PCI reset if pci_resetted; */
sprintf(reset_string, " software PCI"); /* UNIX/VMS don't ever reset PCI buses.. */
} else {
if ( (reset_reason == 0) || ((reset_reason & MC_RESET) == MC_RESET) )
sprintf(reset_string, " power-on");
if ( (reset_reason & SW_RESET) == SW_RESET )
sprintf(reset_string, " system software");
reset_reason = reset_reason & ~SW_RESET; /* Strip off SW_RESET bit; may be set from before.. */
if ( (reset_reason & OCP_RESET) == OCP_RESET )
sprintf(reset_string, " front-panel (OCP)");
if ( (reset_reason & RCM_RESET) == RCM_RESET )
sprintf(reset_string, " Remote Console");
}
printf("The system was last reset via a%s reset\n\n", reset_string);
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