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Conference mvblab::alphaserver_4100

Title:	AlphaServer 4100

Moderator:	MOVMON::DAVISS

Created:	Tue Apr 16 1996
Last Modified:	Fri Jun 06 1997
Last Successful Update:	Fri Jun 06 1997
Number of topics:	648
Total number of notes:	3158

437.0. "Console command magick for ISAbus read/write ???" by BBPBV1::WALLACE (john wallace @ bbp. +44 860 675093) Mon Jan 27 1997 14:50

    I'm working with a partner who's got a 3rd-party ISA parallel interface
    card they want to use with 4100s (it happens to be the NI ATDIO32F,
    which is not very fast digital I/O card, fwiw). They're a VMS shop
    and will be starting this exercise on VMS 6.2.
    
    They're subcontracting device driver development to a 3rd party who
    will be developing on an AlphaStation 255 before testing on a 4100.
    
    So, some questions arise:
    
    1) Are there any differences which it might help to know about between
    the 255 and the 4100, so far as the use of ISA is concerned. E.g. I've
    heard it said that the 4100 implements PCI "aggressively" but is there
    any way that is likely to get as far as the ISA bus ? 
    
    2) Anybody done anything similar successfully (or know of successes) ?
    The "EISA is not supported" statements plastered everywhere can be a
    little worrying, but topic 212 here is encouraging.
    
    3) A basic question: how do I read and write to ISA in console mode on
    a 4100 ? I.e. what's the magick for getting from an ISA address to 
    addresses for use with the console examine physical ">>> E /P" stuff ?
    On some other platforms the magick is in the service guide but I couldn't
    see it in there for the 4100, and an AltaVista search didn't find me
    anything helpful...
    
    hope you like obscure questions (my customers do)
    regards
    john

T.R	Title	User	Personal Name	Date	Lines
437.1	Some PCI differences on the 4100 - may impact ISA	SNYBOY::HARTWIG	Arthur Hartwig, TaN Engineering-Australia	`Mon Jan 27 1997 19:25`	59
	> 1) Are there any differences which it might help to know about between > the 255 and the 4100, so far as the use of ISA is concerned. E.g. I've > heard it said that the 4100 implements PCI "aggressively" but is there > any way that is likely to get as far as the ISA bus ? Two differences I came across in "porting" a PCI driver from AlphaStation 400 to AlphaServer 4100: (I don't know if these will also apply to ISA.) 1) On the '400 I know of no instances where a IOC$WRITE_IO failed to complete the write to the PCI device BEFORE returing to the caller. The ISR for this device merely queued an IPL8 fork, disabled interrupts and returned. The fork function enabled interrupts again. On a 300MHz '4100 over a number of observations, a little less frequently than 1 in 300,000 interrupts the write to the device to clear the "interrupt enabled" bit failed to complete before the interrupt service routine returned and consequently a second interrupt happened before the fork routine ran. The second interrupt re-inserted the fork block on the fork queue (before it had been removed) and corrupted the fork queue. Result: system hang! Another example of the same problem. On transmit complete interrupt the driver had to "complete" frames on the "waiting transmit done" queue. The device has a hardware counter of transmit frames completed. Writing a bit to the device registers decrements the counter. The driver assumed it could write the bit (to decrement the counter), complete the frame on the queue and repeat until the counter reached 0. Because of the delayed write completion sometimes the queue would empty before the counter reached 0 and the system would crash due to perceived data structure inconsistency. Workaround: Depends on your requirements. In general I understand a "real" read (one the compiler won't optimise away) to the same location is required to stall the CPU until the write has completed. In the cases under discussion though I added a flag to mark "Fork queued" and the ISR checks that before issuing the fork (the fork function clears the flag) and in the transmit completion processing I just accepted that the queue might empty before the counter hits zero. 2) On the '400 I know of no circumstances where a IOC$NODE_FUNCTION call fails to disable interrupts. On a '4100 calling IOC$NODE_FUNCTION silently fails to disable interrupts from the requested slot if the system is currently in an ISR for the requested slot. Work-around: find some other way to disable interrupts (e.g. write to the device registers, but see 1) above) > 3) A basic question: how do I read and write to ISA in console mode on > a 4100 ? I have found that the ability to look at device registers from console mode is a very useful feature for debugging device drivers. Its a pity the information is NOT more accessible to the public. A kind reader of this conference sent me the information but indicated it was "Company Confidential" so I am loathe to pass it on. (I can understand the "Company Confidential" tag on the form in which I received it, but can't think of a good reason why a "sanitised" version couldn't or shouldn't be made generally available.)
437.2	Thanks so far...	BBPBV1::WALLACE	john wallace @ bbp. +44 860 675093	`Tue Jan 28 1997 18:06`	6
	Thanks Arthur, most helpful. Any takers on the console commands for ISA I/O ? regards john
437.3		LANDO::CUMMINS		`Tue Jan 28 1997 18:20`	136
	The following examples were given at our AlphaServer 4100 Manufacturing and Field training sessions. You can use "HELP EPCI" for the command syntax. EPCI and DPCI are examine/deposit PCI commands, respectively. - Examining the PCI configuration space for the PCEB - hose 0, bus 0, slot 1 P00>>>epci -c 0 0 1 0 0 -n 10 Hose 0 Bus 0 Slot 1 Function 0 Offset 0 e pmem:f9c0010018 -l -n 10 -s 80 pmem: F9C0010018 04828086 pmem: F9C0010098 02000007 pmem: F9C0010118 00000000 pmem: F9C0010198 0000F810 pmem: F9C0010218 00000000 pmem: F9C0010298 00000000 pmem: F9C0010318 00000000 pmem: F9C0010398 00000000 pmem: F9C0010418 00000000 pmem: F9C0010498 00000000 pmem: F9C0010518 00000000 pmem: F9C0010598 00000000 pmem: F9C0010618 00000000 pmem: F9C0010698 00000000 pmem: F9C0010718 00000000 pmem: F9C0010798 00000003 pmem: F9C0010818 00009940 P00>>> - Examing PCI config space of ISP1020 on hose 1, bus 0, slot 5 P00>>>epci -c 1 0 5 0 0 -n 10 Hose 1 Bus 0 Slot 5 Function 0 Offset 0 e pmem:fbc0050018 -l -n 10 -s 80 pmem: FBC0050018 10201077 pmem: FBC0050098 02000007 pmem: FBC0050118 01000001 pmem: FBC0050198 0000FF10 pmem: FBC0050218 01000800 pmem: FBC0050298 01000000 <- Base Address 1 pmem: FBC0050318 00000000 pmem: FBC0050398 00000000 pmem: FBC0050418 00000000 pmem: FBC0050498 00000000 pmem: FBC0050518 00000000 pmem: FBC0050598 00000000 pmem: FBC0050618 00000000 pmem: FBC0050698 00000000 pmem: FBC0050718 00000000 pmem: FBC0050798 00000114 pmem: FBC0050818 00000000 P00>>> - Examing registers on the ISP1020 - obtain the base address from the the output above ( the second base address is in memory space - use "-m" qualifier). The ISP1020's registers are word aligned - use the "-w" qualifier. P00>>>epci -m 1 01000000 -w -n 10 fa20000008<4:3> = 1 (word access) fa20000008<6:5> = 0 (bytes 1,0 valid) e pmem:fa20000008 -w -n 10 -s 40 pmem: FA20000008 0000 pmem: FA20000048 0000 pmem: FA20000088 0000 pmem: FA200000C8 0000 pmem: FA20000108 0000 pmem: FA20000148 0000 pmem: FA20000188 0000 pmem: FA200001C8 0000 pmem: FA20000208 0000 pmem: FA20000248 0000 pmem: FA20000288 0000 pmem: FA200002C8 0000 pmem: FA20000308 0000 pmem: FA20000348 0000 pmem: FA20000388 0000 pmem: FA200003C8 0000 pmem: FA20000408 0000 P00>>> - Examining registers on the PCEB - IO space 1) Examine Flash Control register with byte access P00>>>epci 0 -i 27 -b f9800004e0<4:3> = 0 (byte access) f9800004e0<6:5> = 3 (byte 3 valid) e pmem:f9800004e0 -l -s 20 pmem: F9800004E0 00000000 2) Deposit the Flash Control register - Note that the data is shifted to the valid byte position, byte 3. P00>>>dpci 27 33 f9800004e0<4:3> = 0 (byte access) f9800004e0<6:5> = 3 (byte 3 valid) d pmem:f9800004e0 33000000 -l -s 20 3) Examine Flash Control register with byte access P00>>>epci 0 -i 27 -b f9800004e0<4:3> = 0 (byte access) f9800004e0<6:5> = 3 (byte 3 valid) e pmem:f9800004e0 -l -s 20 pmem: F9800004E0 33000000 4) Examine the Flash Control register with longword access - Note the the longword address. P00>>>epci 0 -i 27 -l f9800004f8<4:3> = 3 (long access) f9800004f8<6:5> = 3 (all bytes valid) e pmem:f9800004f8 -l -s 80 pmem: F9800004F8 33000000 - Examing EISA device CSR's 1) Examine the ID CSR for the EISA device in slot 1 off hose 0 P00>>>epci 0 -e 1 c80 -l f980039018<4:3> = 3 (long access) f980039018<6:5> = 0 (all bytes valid) e pmem:f980039018 -l -s 80 pmem: F980039018 002EA310 2) Examine the ID CSR for the EISA device in slot 2 off hose 0 P00>>>epci 0 -e 2 c80 -l f980059018<4:3> = 3 (long access) f980059018<6:5> = 0 (all bytes valid) e pmem:f980059018 -l -s 80 pmem: F980059018 00009004 P00>>>