| Title: | FDDI - The Next Generation |
| Moderator: | NETCAD::STEFANI |
| Created: | Thu Apr 27 1989 |
| Last Modified: | Thu Jun 05 1997 |
| Last Successful Update: | Fri Jun 06 1997 |
| Number of topics: | 2259 |
| Total number of notes: | 8590 |
I have question about PCM state diagram shown in page 197 of SMT V6.2 document. I have two questions regarding state transition PC(34) and (33) on that. The first question is that when TPC(C_Min) in PC3 CONNECT state starts. Does the TPC in PC3 start at entering PC3 or at setting LS_Flag for HLS? 2nd question is whether a transition PC(33) reset TPC(C_Min) for PC3 CONNECT. Foot note [14] in page 198 describes about RESET TPC and it mentions that TPC reset on every transition even a transition where the destination state is the same as the originating state. So, Is PC(33) considered as a transition such as it in foot note [14] and PC(33) restart TPC(C_Min) again? I was working for interoperability testing with some Japanese vendors and I knew these vendors misunderstood this interpretation. These vendors are telling us that PC3 must remain for least C_Min AFTER received Halt symbols from other station. I don't believe this. I believe that PC3 must remain for least C_Min after entering PC3 state but can go to PC4 as soon as seeing Halt if TPC has taken over C_Min then. Any comment would be appreciated, Naoki Ido
| T.R | Title | User | Personal Name | Date | Lines |
|---|---|---|---|---|---|
| 402.1 | KONING::KONING | Paul Koning, NI1D | Mon Nov 25 1991 14:53 | 21 | |
The vendor you talked to is correct. As the spec says, TPC is reset on every transition, including those where the destination state is the same as the source state. The "...including" part specifically refers to transitions such as PC(33). So when PC(33) is taken, TPC is reset to zero. This means PC(34) will be taken after a C_Min delay from the time HLS was RECEIVED by this station. The reason why this is necessary is to ensure that the other station will see HLS long enough. If the other station is starting after yours, then the standard ensures it will still receive HLS for C_Min after it starts sending HLS. The alternative interpretation would result in a very short HLS. The reason we have C_Min is to deal with components in the link that start up slowly (such as multi-mode to single-mode converters). The rule as written is necessary for this to work. I believe we had a bug at one time that caused this part to work incorrectly. I'm not sure what the status of the fix is. paul | |||||
| 402.2 | Any solutions? | TKTVFS::IDO | Naoki Ido, CSC/TOKYO, EWB, DTN 680-2456 | Tue Nov 26 1991 04:33 | 14 |
Paul, Thank you for your explanation. I could make sense TPC handling in PCM but I frankly did want to hear the other one. This is bad news for us. As far as I look at my PCM trace, DEFCN doesn't restart TPC at PC(33) and sends IDLE symbols immediately after we saw HALT. Since the vendor I want to connect to has long TB_Min, Halt comes into us after we have been in P3. The connection is therefore never successful. You sead you had this problem before but the bug is still alive in my DB500 and DC500. I'm not sure for second generation DB5xx/6xx, DEFZA, and DEMFA. Is there any solution or workaroud in DEC? Best Regards, Naoki | |||||
| 402.3 | KONING::KONING | Paul Koning, NI1D | Tue Nov 26 1991 12:00 | 5 | |
It may be possible to increase TB_Min at our end, and that may help. You should get in touch with the product manager for whatever product is involved. paul | |||||