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Title: | VAX MACRO assembler issues |
|
Moderator: | TLE::TROWEL |
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Created: | Mon Mar 30 1987 |
Last Modified: | Wed Jun 04 1997 |
Last Successful Update: | Fri Jun 06 1997 |
Number of topics: | 257 |
Total number of notes: | 916 |
254.0. "Alpha V7.0/later %SYSTEM-F-HPARITH w EDIV #32,R0,R2,R1" by CSC32::D_SANFORD () Thu Mar 06 1997 18:35
OpenVMS Alpha V7.1, AMAC V3.0-23-311D -> %SYSTEM-F-HPARITH
OpenVMS Alpha V7.0, AMAC V2.2-19-2671 -> %SYSTEM-F-HPARITH
OpenVMS Alpha V6.2, AMAC V2.1-17-2671 -> OK
This simple example fails after upgrading to OpenVMS Alpha V7.0 or
later. If fails on the line:
EDIV #32,R0,R2,R1 (SUBL/V instruction? from machine listing)
With:
%SYSTEM-F-HPARITH, high performance arithmetic trap, Imask=02000000,
Fmask=00000000, summary=40, PC=000000000003006C, PS=0000001B
-SYSTEM-F-INTOVF, arithmetic trap, integer overflow at
PC=000000000003006C, PS=0000001B
If you don't clear R1 first, it doesn't get the overflow. If you put
a 1 in R0, it doesn't get the overflow.
Regards, Drew Sanford
Customer Support Center
C970306-5609
$ ! command procedure to duplicate problem
$ create a.for
PROGRAM A
CALL SETUP
END
$ create b.mar
.TITLE B
SETUP::
.CALL_ENTRY PRESERVE=<R2>
CLRL R1
CLRL R0
EDIV #32,R0,R2,R1
RET
.END
$ fortran a
$ MACRO/MIGRATION/NOTIE/ENABLE=OVERFLOW/NOLIST/NOOPT B
$ link a,b
$ run a
T.R | Title | User | Personal Name | Date | Lines |
---|
254.1 | | STAR::BENSON | My other fiddle is a Strad | Wed Mar 12 1997 10:29 | 7 |
| This problem has already been fixed for the next release. Integer
overflow could be erroneously signalled when the EDIV dividend was zero.
One workaround is to disable overflow checking for that single
instruction.
Tom
|