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Conference npss::gigaswitch

Title:	GIGAswitch
Notice:	GIGAswitch/FDDI Jan 97 BL3.1 914.0 documentation 412.1ion 412.1
Moderator:	NPSS::MDLYONS

Created:	Wed Jul 29 1992
Last Modified:	Fri Jun 06 1997
Last Successful Update:	Fri Jun 06 1997
Number of topics:	995
Total number of notes:	4519

966.0. "AGL-2+ E3 Clock mibs" by OPCO::NET_JPM () Fri Apr 04 1997 07:07

I have a pair of E3 34Mb links between two GIGAswitch FDDIs AGL cards that do
not even light up the PHY lights. The cards them selfs do if you loop TX to RX.

A statement was made to the effect that the line was expecting to get the clock
from the GIGAswitch. Looking in the AGL Reference guide page 3-10 shows a
variable dsx3TransmitClockSource which I thought may help by changeing to
loop-timing.When I went to try this I found that I could not find this variable
in the  MIBs I had for 311. 

Have I missed something ?


Thanks for any help.


John

T.R	Title	User	Personal Name	Date	Lines
966.1		NPSS::MDLYONS	Michael D. Lyons DTN 226-6943	`Fri Apr 04 1997 10:46`	3
	You're probably missing the DS3 MIB. MDL
966.2		NPSS::MDLYONS	Michael D. Lyons DTN 226-6943	`Fri Apr 04 1997 10:55`	4
	A copy of the DS3 MIB (RFC 1407), along with the other MIBs used by the GIGAswitch/FDDI system is kept at the www page. MDL