T.R | Title | User | Personal Name | Date | Lines |
---|
663.1 | Denial | KAMPUS::NEIDECKER | EUROMEDIA: Distributed Multimedia Archives | Tue Mar 25 1997 03:12 | 12 |
| There is no such rule (it somehow would imply that you needed to
change a little bit in control logic in a design and keep everything
else constant). To the best of my knowledge, nobody has done it
that way ever.
The primary advantage of OOO execution is that it can dynamically
discover parallelism and dynamically disambiguate memory references.
On certain floating point codes that makes over 100% difference.
Other than that, look up die sizes, clock speeds and SPEC ratings
for various processors and try to make up this nonexistent rule of
thumb.
|
663.2 | +40% has been given here | NETRIX::"[email protected]" | Bjorn Fehrm | Wed Mar 26 1997 00:18 | 10 |
| Hello,
a Hudson guy who used to work at HPs chip activity proposed out of order as a
speedup for Ev5+. He wrote HP had reach the conclusion it gave approx 40%
extra on a typical design everything else constant.
Can't remeber the number of the note.
Bj�rn
[Posted by WWW Notes gateway]
|
663.3 | | GEMEVN::GLOSSOP | Only the paranoid survive | Wed Mar 26 1997 10:35 | 15 |
| Any "number" is dependent on a variety of factors, including:
- Estimates of memory latency (e.g. the longer memory latency is measured
in "issue slots", the more likely reordering will have an impact)
- Various factors in a particular processor implementation (including
if it is a "short tick" style design, etc.)
- The instruction set
- The properties of the code being executed (i.e. was it already scheduled
based on some latency being present, etc.)
My personal guess is that ev6 will benefit considerably more than many
of the competitors given all of these.
|